GigEVision FPGA IP

GigEVision camera (device) FPGA IP and embedded software for delivering image streams. GVSP/GVCP, 1000BASE-T or 2.5GBASE-T, SGMII+ or 1G RGMII (for FPGAs without SerDes), GenICam control, chunk data, Lattice ECP5 proven.

GigEVision FPGA IP — GenICam camera interface and stream path diagram
Category
FPGA IP
Role
Camera (Device)
Network
1000BASE-T · 2.5GBASE-T
PHY I/F
SGMII+ · 1G RGMII

GigEVision FPGA and microcontroller IP for delivering image streams (camera side).

GigEVision Camera (Device) FPGA IP

  • GVSP stream packet generation
  • GVCP control packets routed to/from microcontroller
  • Implemented for 1000BASE-T or 2.5GBASE-T PHY
  • SGMII+ interface to PHY over FPGA generic 8B/10B SerDes
  • 1G RGMII interface for FPGAs without SerDes
  • Capable of any GigEVision pixel format
  • Pixel FIFO input for integration
  • Chunk data capable
  • Serial port for control and monitoring

GigEVision Camera (Device) Embedded Software

  • Ethernet stack and GenICam (GVCP) processor using microcontroller
  • DHCP, ARP, IP, UDP, Ping, Link Local addressing, and related stack features
  • Integrated RISC-V FPGA soft controller implementation
  • Interfaces with FPGA via RMII 6-wire Ethernet PHY interface
  • Compliant GigEVision GenICam control functionality
  • GenICam .xml file held in SPI flash

GigEVision Host Firmware

  • Currently not available; in planning phase.

Multi-Platform FPGA Compatible

  • Currently implemented on Lattice ECP5 (low cost)
  • Generic Tecphos firmware libraries will compile for any architecture

FPGA Requirements

  • For SGMII+: SerDes compatible with Ethernet SGMII 8B/10B data rates
  • For 1G RGMII: no SerDes required — suitable for FPGAs without high-speed serial transceivers

License

  • Standard license is per project with no per-unit fees
  • Pre-compiled modules and source code licenses available
  • Licenses include 8 hours of customization
  • Licenses include one year of support
  • License discounts for multiple licenses

Demo video

Lattice Developer Conference demo of Tecphos GigEVision and CoaXPress IP on Lattice CertusPro-NX (recorded for Lattice Semiconductor):

GigEVision FPGA IP — GenICam camera interface and stream path
Tecphos circuit board with image sensor

Have an imaging project in mind?

Whether you need FPGA development, a custom video interface, or help with a difficult imaging problem — we are ready to help.

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